1. Field of the Invention
The present invention generally relates to a photo mask and a semiconductor device fabricated using the same, and more specifically, to a photo mask and a semiconductor device fabricated using the same wherein a zigzag waved step asymmetry recess (“W-STAR”) gate region is disposed in a semiconductor substrate via a photolithography method using a zigzag W-STAR photo mask corresponding to a predetermined region disposed in the semiconductor substrate partially overlapping a storage node contact region and a gate region in an active region to decrease sheet resistance for a storage node contact and to increase a gate channel length, thereby improving a gate leaning phenomenon.
2. Description of the Related Art
Generally, a gate causes a problem such as a Short Channel Effect (“SCE”) as the semiconductor device is highly integrated.
To solve the problem, a step asymmetry recess (“STAR”) gate region is introduced in order to improve a refresh characteristic and a gate channel length of the semiconductor device in a MOSFET fabrication. A stepped gate is disposed on the STAR gate region. A predetermined region of the STAR gate region is etched via a lithography method using a STAR photo mask, wherein the predetermined region overlaps a storage node contact region and a portion of a gate region adjacent thereto.
FIG. 1 is a top view illustrating a conventional photo mask.
Referring to FIG. 1, a photo mask 10 has a light-transmitting pattern 15 and a light-shielding pattern 13. The light-shielding pattern 13 disposed on a transparent substrate 11 corresponds to a predetermined region disposed on the semiconductor substrate overlapping the storage region contact region and a portion of the gate region adjacent thereto. The light-shielding pattern 13 defines a STAT gate region disposed in the semiconductor substrate.
FIG. 2 is a layout of a conventional semiconductor device.
Referring to FIG. 2, a predetermined region 40 of the semiconductor substrate 20 corresponding to the light-shielding pattern 13 disposed on the photo mask 11 is the recessed STAR gate region, wherein the predetermined region 40 overlaps the storage node contact region 30 and a portion of the gate region 35 adjacent thereto.
FIG. 3 is a cross-sectional view taken along the line I-I′ of FIG. 2 illustrating the conventional semiconductor device.
Referring to FIG. 3, a device isolation film 23 defining the active region is disposed in the semiconductor substrate 20. The recessed STAR gate region is disposed within the STAR gate region 55 via a photolithography method using the STAR photo mask 10 of FIG. 1. The recessed STAR gate region includes the storage node contact region and a portion of the gate region adjacent thereto.
In accordance with the conventional photo mask and semiconductor device, a stepped gate is disposed on the STAR gate region. The recessed STAR gate region is formed via a photolithography method using a line/space photo mask overlapping the storage node contact region and a portion of the gate region adjacent thereto disposed on the semiconductor substrate.
However, a lower step of the stepped gate causes more shrinkage phenomenon during the subsequent heat treatment process after the formation of a polysilicon layer for a gate electrode. As a result, there is a gate leaning problem such as the gate collapsing toward the storage node contact region.